Packaging Engineer - Wafer Level CSP
Job ID 5849
Job Location Milpitas, CA
Job Category Engineering
Date Posted Dec 12, 2011
COMPANY INFORMATION
Intersil Corporation is a leader in the design and manufacture of high-performance analog, mixed-signal and power management semiconductors. The Company's products address some of the fastest growing markets within the communications, computing, high-end consumer and industrial electronics markets. For more information about Intersil or to find out how to become a member of our winning team, visit the Company's web site and career page at www.intersil.com.
QUALIFICATIONS:
•Masters / Bachelor Degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering.
•A minimum of 8-10 years of relevant hands-on experience in package technology and product development in area of wafer level chip scale packaging / 2.5/3D wafer level packaging.
•Strong understanding of wafer level packaging issues, foundry/wafer level packaging materials and their interaction. Extensive knowledge of WLP design rules and experience with materials selection for large Ball-on-Pad and RDL (fan-in/fan-out) WLCSP packages, WLCSP board design rules, WLCSP component and board level reliability qualification, DOE design and implementation, and SPC.
•A track record of working with in-house or subcontracted assembly on wafer level packaging technology development and product releases to high volume manufacturing with aggressive timelines.
•Strong interpersonal, communication and presentation skills. Strong analytical and problem solving skills.
•Direct experience in 3D/TSV packaging is a plus
•Knowledge of Mandarin Chinese a plus.
RESPONSIBILITIES:
•Design and develop package and interconnect methods for Intersil’s packaging needs in the areas of wafer level chip scale packaging.
•Benchmark, select and qualify suitable materials, processes and assembly subcontractors.
•Work with subcontractors to develop, run DOE to optimize processes and determine the process spec.
•Resolve all process integration issues by ensuring all window checks are done on critical process steps.
•Establish production controls and monitor to ensure there is no room for quality incidents.
•Qualify the package and implement into production, with ramp up monitor.
•Work with subcontractors to monitor and resolve process issues early in the production to ensure only parts with superior quality shipped to customer.
•Develop and maintain technical expertise on advances and innovations in wafer level packaging and flip chip interconnects.
•Drive wafer level package development roadmap.
